Bad market intelligence

Tuesday, Nov 19, 2013 · 700 words · approx 4 mins to read

There’s a report on AllThingsD today that cites a bill-of-materials (BoM) estimate from IHS in order to estimate Sony’s profit margin on the PlayStation 4.

I’ve read hundreds of these so-called BoM “market intelligence” reports in my time, and I’m confident asserting that “intelligence” isn’t something that applies to the vast majority of them.

In this particular case, IHS are attempting to come up with a BoM cost for a device dominated by a large area, large volume SoC with no other customer but Sony, with relatively large amounts of expensive memory to go with it.

IHS couldn’t have a harder problem to solve with the SoC. They guess — and it really is just a grossly inaccurate guess — $100 for that chip. It’s never presented as plus or minus a (large) margin. It’s never put into context against pricing of similar chips where the volume price is actually available to scrutinise. It’s just $100.

Unless you’re AMD’s account manager at TSMC, TSMC themselves, or Sony, you might as well just say $200 and turn the story the other way and report that the PS4 costs more than they’re selling it for. IHS also claim that the total BoM is $18 less than retail price. You know, that retail price that myriad middlemen take their cut of before the retailer hands it over for the end user to take home. They might as well say it’s $118 and that Sony are exactly breaking even. All possible versions of that story that I’ve just presented, plus the original at AllThingsD, are just as accurate as each other for the purposes of a BoM analysis that happens out in public, far away from the actual manufacturing and hard data they need.

Then they claim that large area chips have a higher probability of suffering from defects, and hint that big chips raise costs. Here’s the quote:

“But, in the complex world of chip manufacturing, bigger isn’t necessarily better. Chips with a larger surface area have a higher probability of suffering from manufacturing defects, Rassweiler said. That, in turn, means that the number of good chips on each silicon wafer tends to be lower, meaning more chips overall have to be manufactured, raising costs overall.”

None of that is true. None of that is patently false either, but big can be (a lot, depending on what you’re making) better. Bigger means you can have more block-level redundancy, plus a statistically higher chance the defect will be in a structure that can survive defects and still operate. Your yields could well go up if you make a bigger chip. You could get less chips per wafer, but maybe more you can sell, so your revenue per wafer is maybe higher.

Can. Could. Maybe. I disclaim it like that because it’s never that simple with complex semiconductor devices. The highest yield complex logic semiconductor devices I know of are made on leading edge process technology and push the optics to their limit on huge 600 square millimetres or so parts (modern high-end FPGAs). Not all defects are fatal.

Then they flat out say yields for the PS4 SoC are at 2/3rds. Sony say it’s almost perfect. They pay for it. TSMC haven’t had reported yield problems on 28nm for a long time. Yet it’s somehow 2/3rds on a chip that TSMC won’t consider to be large, which they make on their fully mature, no longer leading-edge foundry process. You don’t get data from IHS to back that up, just ‘market intelligence’.

Then one of the leading technology publications in the world spits out their BoM estimates with no error margin, as fact, and doesn’t question the semiconductor production knowledge required to make those hard factual statements about yields for that kind of chip on that kind of process.

What a terrible joke being played on everyone who reads that fluff piece, or that report, and walks away thinking they know new facts. They know new total bullshit. None of it is real.